Encoding:

POOL32A

000000

rt

rs

sa

0

SHRA.PH

01100110101

POOL32A

000000

rt

rs

sa

0

SHRA_R.PH

11100110101

6

5

5

4

1

11

SPECIAL3

011111

0

sa

rt

rd

SHRA.PH

01001

SHLL.QB

010011

SPECIAL3

011111

0

sa

rt

rd

SHRA_R.PH

01101

SHLL.QB

010011

6

1

4

5

5

5

6

Format:

SHRA[_R].PH 

Shift Right Arithmetic Vector Pair Halfwords

SHRA.PH   rdt, rts, sa

microMIPSDSP

Shift Right Arithmetic Vector Pair Halfwords

SHRA_R.PH rdt, rts, sa

microMIPSDSP

Shift Right Arithmetic Vector Pair Halfwords

Purpose:

Shift Right Arithmetic Vector Pair Halfwords

Element-wise arithmetic right-shift of two independent halfwords in a vector data type by a fixed number of bits, with optional rounding.

Description:

rdt = sign_extend(rnd16(rts31..16 >> sa) || rnd16(rts15..0 >> sa))

The two right-most halfword values in register rt are each independently shifted right by sa bits, with each value's original sign bit duplicated into the sa most-significant bits emptied by the shift.

In the non-rounding variant of this instruction, the two independent results are then written to the corresponding halfword elements of destination register rd.

In the rounding variant of the instruction, a 1 is added at the most-significant discarded bit position before the results are written to destination register rd.

For both instructions, the sign of the left-most halfword result is sign-extended into the 32 most-significant bits of the destination register.

Restrictions:

No data-dependent exceptions are possible.

The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation:

SHRA.PH:
   tempB15..0 = shift16RightArithmetic( GPR[rts]31..16, sa )
   tempA15..0 = shift16RightArithmetic( GPR[rts]15..0, sa )
   GPR[rdt]63..0 = (tempB15)32 || tempB15..0 || tempA15..0
SHRA_R.PH:
   tempB15..0 = rnd16ShiftRightArithmetic( GPR[rts]31..16, sa )
   tempA15..0 = rnd16ShiftRightArithmetic( GPR[rts]15..0, sa )
   GPR[rdt]63..0 = (tempB15)32 || tempB15..0 || tempA15..0
function shift16RightArithmetic( a15..0, s3..0 )
   if ( s3..0 = 0 ) then
      temp15..0 = a15..0
   else
      sign = a15
      temp15..0 = ( signs || a15..s )
   endif
   return temp15..0
endfunction shift16RightArithmetic
function rnd16ShiftRightArithmetic( a15..0, s3..0 )
   if ( s3..0 = 0 ) then
      temp16..0 = ( a15..0 || 0 )
   else
      sign = a15
      temp16..0 = ( signs || a15..s-1 )
   endif
   temp16..0 = temp + 1
   return temp16..1 
endfunction rnd16ShiftRightArithmetic

Exceptions:

Reserved Instruction, DSP Disabled